The present invention relates to an insulated gate semiconductor device, and more particularly, to an insulated gate bipolar transistor (IGBT) provided with a trench gate and a device structure of the same.
Typical insulated gate transistors include IGBTs broadly used in the art, and the improvement having a new feature of accumulating electrons below the gate has been developed in the name of injection enhanced gate transistor (IEGT), which can implement greater electric power and has become more common in the art.
In the prior art insulated gate semiconductor device, a ring-shaped diffusion region in the outer peripheral part and a diffusion layer underlying a gate interconnection are formed in connection with a base diffusion layer in a cell region.
In such an arrangement, however, a semiconductor device, such as the IEGT, of particularly enhanced withstand voltage has its cell region store an increased amount of cumulative carriers and reduce negative capacity, and therefore, it employs trench gates for gate electrodes to define a floating dummy base region without contact with an emitter electrode in a base region between the trench gates.
The negative capacity may be disadvantageous in that, unless a potential at a p-type dummy base layer in a dummy cell region is completely floating, there arises a problem of overshooting of gate-emitter voltage Vge. More specifically, even if the device design is deliberate in making the potential at the p-type dummy base layer floating, a parasitic structure (e.g., a partial connection with a cell edge and a terminating portion of the junction) permits parasitic resistance to fix the potential at approximately zero level during the OFF-time of the transistor, and succeedingly turning the transistor ON to cause the gate-emitter voltage Vge to reach threshold voltage Vth results in the potential at the p-type dummy base layer rapidly rising simultaneous with the injection of holes, which eventually brings about a phenomenon of overshooting of the gate-emitter voltage Vge.
The provision of the dummy base region isolated from the emitter layer urges carriers to be injected so as to reduce the ON-voltage, but there still arises a disadvantage that carriers remain in the dummy base region on switching the semiconductor device on, which adversely reduces the breakdown durability.
While the current is being cut off, the device must be drained by eliminating the carriers remaining therein, and thus, carriers in the cell region are removed through the emitter electrode while the carriers remaining in the peripheral regions of the device are eliminated through the ring-shaped diffusion region in the outer peripheral part and then through the base diffusion layer in the cell region. Completely isolating the ring-shaped diffusion region in the outer peripheral part and the diffusion layer underlying the gate interconnection from the base diffusion layer in the cell region, however, a device draining route disappears which urges the carriers to flow out of the outer peripheral part during the current cutoff, and this is prone to lead to the reduction of the cutoff durability.